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3.3V CMOS 16-BIT REGISTERED TRANSCEIVER
Integrated Device Technology, Inc.
IDT74FCT163952A/B/C
FEATURES:
* 0.5 MICRON CMOS Technology * Typical tSK(o) (Output Skew) < 250ps * ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) * Packages include 25 mil pitch SSOP, 19.6 mil pitch TSSOP and 15.7 mil pitch TVSOP * Extended commercial range of -40C to +85C * VCC = 3.3V 0.3V, Normal Range or VCC = 2.7 to 3.6V, Extended Range * CMOS power levels (0.4W typ. static) * Rail-to-Rail output swing for increased noise margin * Low Ground Bounce (0.3V typ.) * Inputs (except I/O) can be driven by 3.3V or 5V components
DESCRIPTION:
The FCT163952A/B/C 16-bit registered transceivers are built using advanced dual metal CMOS technology. These high-speed, low-power devices are organized as two independent 8-bit D-type registered transceivers with separate input and output control for independent control of data flow in either direction. For example, the A-to-B Enable (xCEAB) must be LOW to enter data from the A port. xCLKAB controls the clocking function. When xCLKAB toggles from LOW-to-HIGH, the data present on the A port will be clocked into the register. xOEAB performs the output enable function on the B port. Data flow from the B port to A port is similar but requires using xCEBA, xCLKBA, and xOEBA inputs. Full 16-bit operation is achieved by tying the control pins of the independent transceivers together. The FCT163952A/B/C have series current limiting resistors. These offer low ground bounce, minimal undershoot, and controlled output fall times-reducing the need for external series terminating resistors.
FUNCTIONAL BLOCK DIAGRAM
1CEBA 1CLKBA 1OEAB 1CEAB 1CLKAB 1OEBA C CE D C CE D
2CEBA 2CLKBA 2OEAB 2CEAB 2CLKAB 2OEBA C CE D C CE D
1A1
2A1
1B1
2B1
TO 7 OTHER CHANNELS
3096 drw 01
TO 7 OTHER CHANNELS
3096 drw 02
The IDT Logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE
(c)1996 Integrated Device Technology, Inc.
AUGUST 1996
8.10
DSC-3096/4
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IDT74FCT163952/A/C 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER
COMMERCIAL TEMPERATURE RANGE
PIN CONFIGURATIONS
PIN DESCRIPTION
Pin Names xOEAB Description A-to-B Output Enable Input (Active LOW) B-to-A Output Enable Input (Active LOW) A-to-B Clock Enable Input (Active LOW) B-to-A Clock Enable Input (Active LOW) A-to-B Clock Input B-to-A Clock Input A-to-B Data Inputs or B-to-A 3-State Outputs B-to-A Data Inputs or A-to-B 3-State Outputs
3096 tbl 01
1OEAB 1CLKAB 1CEAB
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
56 55 54 53 52 51 50 49 48 47 46 45 44 SO56-1 43 SO56-2 SO56-3 42 41 40 39 38 37 36 35 34 33 32 31 30 29
1OEBA 1CLKBA 1CEBA
xOEBA xCEAB xCEBA xCLKAB xCLKBA xAx xBx
GND
1A1 1A2
GND
1B1 1B2
VCC
1A3 1A4 1A5
VCC
1B3 1B4 1B5
ABSOLUTE MAXIMUM RATINGS(1)
Symbol VTERM(2) VTERM(3) VTERM(4) TSTG IOUT Description Terminal Voltage with Respect to GND Terminal Voltage with Respect to GND Terminal Voltage with Respect to GND Storage Temperature DC Output Current Max. -0.5 to +4.6 -0.5 to +7.0 -0.5 to VCC + 0.5 -65 to +150 -60 to +60 Unit V V V C mA
GND
1A6 1A7 1A8 2A1 2A2 2A3
GND
1B6 1B7 1B8 2B1 2B2 2B3
GND
2A4 2A5 2A6
GND
2B4 2B5 2B6
3096 lnk 03 NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. Vcc terminals. 3. Input terminals. 4. Output and I/O terminals.
VCC
2A7 2A8
VCC
2B7 2B8
GND
2CEAB 2CLKAB 2OEAB
GND
2CEBA 2CLKBA 2OEBA
FUNCTION TABLE(1,3)
Inputs xCEAB CEAB H X L L X xCLKAB X L X xOEAB OEAB L L L L H xAx X X L H X Outputs xBx B(2) B(2) L H Z
SSOP/ TSSOP/TVSOP TOP VIEW
3096 drw 03
CAPACITANCE (TA = +25C, f = 1.0MHz)
Symbol Parameter(1) CIN Input Capacitance CI/O I/O Capacitance Conditions VIN = 0V VOUT = 0V Typ. 3.5 3.5 Max. Unit 6.0 pF 8.0 pF
3096 lnk 04
NOTE: 1. This parameter is measured at characterization but not tested.
NOTES: 3096 tbl 02 1. A-to-B data flow is shown: B-to-A data flow is similar but uses, xCEBA, xCLKBA, and xOEBA. 2. Level of B before the indicated steady-state input conditions were established. 3. H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care = LOW-to-HIGH Transition Z = High-impedance
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IDT74FCT163952/A/C 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER
COMMERCIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: Commercial: TA = -40C to +85C, VCC = 2.7V to 3.6V
Symbol VIH VIL II H II L IOZH IOZL VIK IODH IODL VOH Parameter Input HIGH Level (Input pins) Input HIGH Level (I/O pins) Input LOW Level (Input and I/O pins) Input HIGH Current (Input pins) Input HIGH Current (I/O pins) Input LOW Current (Input pins) Input LOW Current (I/O pins) High Impedance Output Current (3-State Output pins) Clamp Diode Voltage Output HIGH Current Output LOW Current Output HIGH Voltage VCC = Max. VCC = Max. VI = 5.5V VI = VCC VI = GND VI = GND VO = VCC VO = GND VCC = Min., IIN = -18mA VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V(3) VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V(3) VCC = Min. VIN = VIH or VIL VCC = 3.0V VIN = VIH or VIL VCC = Min. VIN = VIH or VIL IOH = -0.1mA IOH = -3mA IOH = -8mA IOL = 0.1mA IOL = 16mA IOL = 24mA VCC = 3.0V IOL = 24mA VIN = VIH or VIL VCC = Max., VO = GND(3)
--
Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level
Min. 2.0 2.0 -0.5 -- -- -- -- -- -- -- -36 50 VCC-0.2 2.4 2.4 (5) -- -- -- -- -60 -- --
Typ.(2) -- --
--
Max. 5.5 VCC+0.5 0.8
Unit V V
-- -- -- -- -- -- -0.7
1 1 1 1 1 1
-1.2
A
A
V mA mA V
-60 90 -- 3.0 3.0 -- 0.2 0.3 0.3
-135
-110 200 -- -- -- 0.2 0.4 0.55 0.50 -240
--
VOL
Output LOW Voltage
V
IOS VH ICCL ICCH ICCZ
Short Circuit Current(4) Input Hysteresis Quiescent Power Supply Current
mA mV
150 0.1
VCC = Max., VIN = GND or VCC
10
A
NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 3.3V, +25C ambient. 3. Not more than one output should be tested at one time. Duration of the test should not exceed one second. 4. This parameter is guaranteed but not tested. 5. VOH = VCC -0.6V at rated current.
3096 lnk 05
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IDT74FCT163952/A/C 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER
COMMERCIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Symbol ICC ICCD Parameter Quiescent Power Supply Dynamic Power Supply Current(4) Test Conditions(1) VCC = Max. VCC = Max., Outputs Open xOEAB or xOEBA = GND One Input Toggling 50% Duty Cycle VCC = Max., Outputs Open fCP = 10MHz (xCLKAB) 50% Duty Cycle xOEAB = xCEAB = GND xOEBA = VCC One Bit Toggling fi = 5MHz 50% Duty Cycle VCC = Max., Outputs Open fCP= 10MHz (xCLKAB) 50% Duty Cycle xOEAB = xCEAB = GND xOEBA = VCC Sixteen Bits Toggling fi = 2.5MHz 50% Duty Cycle VIN = VCC -0.6V VIN = VCC VIN = GND
(3)
Min. -- --
Typ.(2) 2.0 60
Max. 100 100
Unit A A/ MHz
IC
Total Power Supply Current(6)
VIN = VCC VIN = GND
--
0.6
1.0
mA
VIN = VCC -0.6V VIN = GND
--
0.6
1.1
VIN = VCC VIN = GND
--
3.0
5.0(5)
VIN = VCC -0.6V VIN = GND
--
3.0
5.9(5)
NOTES: 1. For conditions shown as max. or min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 3.3V, +25C ambient. 3. Per TTL driven input; all other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD (fCPNCP/2 + fiNi) ICC = Quiescent Current (ICCL, ICCH and ICCZ) ICC = Power Supply Current for a TTL High Input DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) NCP = Number of Clock Inputs at fCP fi = Input Frequency Ni = Number of Inputs at fi
3096 tbl 07
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4
IDT74FCT163952/A/C 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER
COMMERCIAL TEMPERATURE RANGE
SWITCHING CHARACTERISTICS OVER OPERATING RANGE(5)
FCT163952A Symbol Parameter Condition(1) Min.(2) Max. FCT163952B Min.(2) Max. FCT163952C Min.(2) Max. Unit
Propagation Delay CL = 50pF xCLKAB, xCLKBA to xBx, xAx RL = 500 Output Enable Time xOEBA, xOEAB to xAx, xBx Output Disable Time xOEBA, xOEAB to xAx, xBx Set-up Time HIGH or LOW xAx, xBx to xCLKAB, xCLKBA tH Hold Time HIGH or LOW xAx, xBx to xCLKAB, xCLKBA tSU Set-up Time HIGH or LOW xCEAB, xCEBA to xCLKAB, xCLKBA tH Hold Time HIGH or LOW xCEAB, xCEBA to xCLKAB, xCLKBA tW Pulse Width HIGH or LOW xCLKAB or xCLKBA(4) tSK(o) Output Skew (3)
tPLH tPHL tPZH tPZL tPHZ tPLZ tSU
2.0 1.5 1.5 2.5 2.0 3.0
10.0 10.5 10.0 -- -- --
2.0 1.5 1.5 2.5 1.5 3.0
7.5 8.0 7.5 -- -- --
2.0 1.5 1.5 2.5 1.5 3.0
6.3 7.0 6.5 -- -- --
ns ns ns ns ns ns
2.0
--
2.0
--
2.0
--
ns
3.0 --
-- 0.5
3.0 --
-- 0.5
3.0 --
-- 0.5
ns ns
NOTES: 3096 tbl 08 1. See test circuits and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design. 4. This parameter is guaranteed but not tested. 5. Propagation Delays and Enable/Disable times are with VCC = 3.3V 0.3V, Normal Range. For VCC = 2.7V to 3.6V, Extended Range, all Propagation Delays and Enable/Disable times should be degraded by 20%.
8.10
5
IDT74FCT163952/A/C 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER
COMMERCIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS TEST CIRCUITS FOR ALL OUTPUTS
6V V
CC
SWITCH POSITION
Test Open Drain Disable Low Enable Low Disable High Enable High All Other tests Switch 6V
500 V Pulse Generator R
T IN
V D.U.T.
OUT
50pF C
L
500
3096 drw 05
SET-UP, HOLD AND RELEASE TIMES
DATA INPUT TIMING INPUT ASYNCHRONOUS CONTROL PRESET CLEAR ETC. SYNCHRONOUS CONTROL PRESET CLEAR CLOCK ENABLE ETC. tSU
tH
tREM
tSU
tH
PROPAGATION DELAY
SAME PHASE INPUT TRANSITION tPLH OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION tPHL tPHL
Open GND
GND Open
3096 lnk 09 DEFINITIONS: CL= Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
PULSE WIDTH
3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V
3096 drw 06
LOW-HIGH-LOW PULSE tW HIGH-LOW-HIGH PULSE
1.5V
1.5V
3096 drw 07
ENABLE AND DISABLE TIMES
ENABLE 3V 1.5V 0V VOH 1.5V VOL 3V 1.5V 0V
3096 drw 08
DISABLE 3V 1.5V
CONTROL INPUT tPZL OUTPUT NORMALLY SWITCH 6V LOW tPZH OUTPUT NORMALLY HIGH SWITCH GND 3V 1.5V tPHZ 0.3V 1.5V 0V tPLZ
0V 3V 0.3V VOL VOH 0V
3096 drw 09
NOTES: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. 2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns. 3. If VCC is below 3V, input voltage swings should be adjusted not to exceed VCC.
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IDT74FCT163952/A/C 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER
COMMERCIAL TEMPERATURE RANGE
ORDERING INFORMATION
IDT XX FCT X Temp. Range Drive XXXX Device Type X Package
PV PA PF 952A 952B 952C 163 74
Shrink Small Outline Package (SO56-1) Thin Shrink Small Outline Package (SO56-2) Thin Very Small Outline Package (SO56-3) Non-Inverting 16-Bit Registered Transceiver
16-Bit 3.3Volt -40C to +85C
3096 drw 10
8.10
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